1. Field of the Invention
The present invention relates in general to the manufacture of semiconductor integrated circuits, especially silicon semiconductor integrated circuits.
More particularly, it relates to the dielectric, conducting barrier, and other materials complimentary to silicon that are used in fabricating semiconductor devices and interconnect structures.
2. Description of the Related Art
It was anticipated as early as in 1970s, “If the preceding period of evolution of microelectronics was predominantly associated with development of the technology of active elements, the forthcoming period of its evolution must become essentially development of the interconnect wiring.” [B. F. Dorfman, Micrometallurgy in Microelectronics, Moscow, Metallurgy, 1978, p. 260. Monograph in Russian, submitted for publication in December 1976]
For the past 25 years from that time, integrated circuits (IC) have reached a level of integration when the characteristic propagation time of IC is dominated by interconnect delay rather than the device gate delay. In addition, besides the problems of electrical performance of IC, physical-chemical mechanisms of degradation and failures also progressively focus upon in the interconnecting structures.
Replacement of Aluminum wiring with copper wiring improves of the problems of electrical performance since the Copper specific resistivity is 1.725 micro ohm centimeter versus the aluminum specific resistivity of 2.73 3 micro ohm centimeter. Copper also has theoretically favorable ratios of standard reduction potentials (E(Cu)=+0.521 V vs. E(Al)=−1.662 V) and melting points (T(Cu)=1084 C vs. T(Al)=660 C) in comparison with Aluminum. However, Copper does not solve all the problems. The particularities of the copper surface make copper wiring more sensitive to various mechanisms of degradation. Some of these problems include thermal instability, corrosion, electromigration along the lines, and electro-diffusion or ion migration across the interfaces into the dielectric and semiconductor. Additionally, Copper possesses exceptionally poor adhesion to dielectric materials, including and especially to silicon dioxide. All of the above related problems with Copper result in the use of special interface materials, or thin film barriers, to separate copper from both semiconductor and dielectric materials. This complicates the interconnection technology and diversity of materials employed in the interconnection systems. In turn, the vast assortment of varying conducting and barrier materials multiplies the mechanisms of IC degradation and associated reliability problems.
Dielectrics represent the other side of the interconnection technology problems. In fact, while approaching the −0.1 micrometer resolution level, the microelectronics industry split the dielectric technology into a low-k intralevel/interlevel dielectric and a high-k gate dielectric. While the IC frequency performance requires the utmost possible minimum of dielectric constant in intralevel and interlevel insulation, the necessity to block the tunneling mechanism of current leakage suggest an opposite requirement for the ultra-thin gate dielectric.
A demand for a high-k dielectric does not suggest principle problems. Typically high-k dielectric demands are greater than that of silicon oxide and preferably about 20 units or even higher. Therefore it implies a deviation from silicon dioxide as well as additionally complicating technology, varies the materials employed and complicates associated reliability problems.
The demand for a low-k dielectric, i.e., an insulator possessing an effective dielectric constant of about 2.7 in the current technology and eventually down to 2.0 and lower, results in a new diversity of suggested materials. Such diversity may be estimated to number about 200 (based on issued patents, patent applications, and research literature) different materials. This exceeds the diversity of all other basic materials employed in silicon ICs. However, all the suggested low-k materials possess poor mechanical properties. Most of them have very poor thermal stability or experience vapor, water and impurities penetration. Therefore, they require additional medium-k dielectric barriers, which may compound problems.
The continuing progress of IC frequency performance forces the semiconductor industry to find a technical approach which overcomes the physical limits of conventional silicon associated with electron and hole mobility. This was recently found in “strained silicon”, in which the silicon crystal lattice period in plane increased due to a built-in strain. Although electron and hole mobility may not be increased equally in strained silicon, there is an increasing characteristic frequency of both p-channel and n-channel transistors, in average up to about a 20% increase. Some optimistic estimates suggest up to about a 50% increase. The strained silicon technology already has over 10 different suggested approaches. All those approaches are based on Si/Si—Ge hetero-structures. Although some approaches suggest replacement of Si—Ge layer on the later stages of the IC fabrication process, the Si/Si—Ge based strained silicon entails a further complication of the technology and generates a new source of undesired impurities and instability.
It is also important to note that the broad variety of employed materials, especially low-k dielectrics, and the more complex diversity of interfaces between these materials decrease the thermal stability of the entire IC structure. At the same time, formation or post-formation stabilization of many components in this structure requires relatively high temperatures. This limits both the flexibility of the IC technology and reliability of the final product.
The further progress of the IC technology demands a family of conformable materials, including an entire array of required dielectrics, as well as allowing formation of a functional layer and the matching barrier in a continuous process. Further, a combination of high thermal stability with a low formation temperature is needed for each structural component of the IC structure.
It was found in the late 1970s—early 1980s that the impact activation of chemical reactions by the incident fluxes of energized particles allows overcoming even the highest activation barriers of surface reactions [B. F. Dorfman et al., Sov. Microelec., 11, 349 (1982). B. F. Dorfman et. al., Impact activation of chemical reactions, Sov. Phys. Docl., 28(9)1983, p. 743-745; Translated by American Inst. of Physics. Original articles: 1982]. In these works, nearly room temperature substrates from siloxane precursors formed silica stabilized diamond-like carbon. In the first work, an ion beam, shooting through a siloxane vapor, produced ultra thin silica-stabilized diamond-like carbon films. In the second work, a remote plasma vacuum CVD was employed to deposit relatively thick silica-stabilized diamond-like carbon films possessing hardness up to about 50 GPa. Films possessing diamond-like properties and characterized with the superposing C-C diamond-like, Si—C carbide-like and Si—O quartz-like bonds were successfully deposited upon metallic, semiconductors (silicon, germanium, GaAs, GaP, InP, InSb, CdS, CdTe, CdSe, crystalline diamond, and silicon carbide) and various dielectrics possessing single crystalline, polycrystalline, amorphous and quasi-amorphous structures. Later, silicon-stabilized diamond-like carbon films and various amorphous phases of C—Si system were deposited with a similar technique from different precursors [B. F. Dorfman, et al, Sov. Tech. Phys. Lett. 14, N5 (1988). Transl. by American Institute of Physics, p. 455-457 (1989).]
Further development of these approaches resulted in three major families of stabilized amorphous carbon materials, differentiated by their atomic arrangement, their content of doping elements, and their physical properties. For Atomic-Scale Composites DLN (also known as Dylyn™) see U.S. Pat. Nos. 5,352,493 and 5,466,431; for Strongly bonded quasi-amorphous QUASAM™, see U.S. Pat. No. 6,080,470; and for metal-carbon composites of atomic scale with a controllable range of electrical conductivity from dielectric, to semiconductor, to electrically conducting metallic range see U.S. Pat. Nos. 5,352,493, 5,466,431 and 6,080,470.
Recently, various amorphous materials of Carbon-Silicon-Oxygen-Hydrogen system have been disclosed in patent applications as the most promising low-k dielectrics by the leading companies in the electronic industry.
Novellus Systems, ASM-Japan, Applied Materials, Trikon Technologies, and Mattson Technology are examples of companies that manufacture semiconductor equipment (i.e., chemical vapor deposition equipment) that can deposit carbon-doped oxides (“CDO”). The Novellus Systems carbon-doped oxide film is marketed under the trademark CORAL™, ASM-Japan carbon-doped oxide film is marketed under the trademark AURORA™, Applied Materials carbon-doped oxide film is marketed under the trademark BLACK DIAMOND™, Trikon Technologies CDO film is marketed under the trademark LOW K FLOWFILL™ and Mattson Technology CDO film is marketed under the trademark GREEN DOT™. All of the above companies' approaches are based on doping silicon oxide with carbon or polymerization of carbon and silicon-containing molecular species.
While the dielectric properties of the films from the above mentioned companies may be acceptable, none of these technologies provides a satisfactory combination of mechanical and electrical properties. Another problem with existing low-k dielectric materials is the absorption of moisture. Various expensive approaches have been suggested, such as post-processing a shallow implantation to form a shallow compact layer over a dielectric by United Microelectronics Corp. (Hsinchu, T W; P6423652 Chang et al. Jul. 23, 2002 438/782). In this process the shallow implantation is carried out using boron ions at an energy level of between about 10 and 50 keV with a relatively high dosage up to 1016 at/cm2.
Recently, Angstrom Systems, Inc. of Santa Clara, Calif., patented a continuous method for depositing a film by a modulated ion-induced atomic layer deposition (Mil-ALD) technique suitable for deposition of various films including low dielectric constant and high dielectric constant films, see U.S. Pat. No. 6,416,822 Chiang, et al. This patent exactly corresponds to the above-referred works found in B. F. Dorfman, et al, Sov. Tech. Phys. Lett. 14, N5 (1988). Transl. by American Institute of Physics, p. 455-457 (1989), while proposing the deposition reaction primarily via substrate exposure to impinging ions wherein the ions are used to deliver the necessary activation energy to the near surface atoms and adsorbed reactants via collision cascades.
International Business Machines Corporation recently patented a low-k dielectric material with inherent copper ion migration barrier. See U.S. Pat. No. 6,414,377, Cohen, et al. An interlayer dielectric for preventing Cu ion migration in semiconductor structure comprises a dielectric material that has a dielectric constant of 3.0 or less and an additive selecting from the group consisting of sulfur compounds, sulfide compounds, cyanide compounds, multidentate ligands and polymeric compounds. The additive is capable of binding Cu ions, as well as being soluble in the dielectric material and being substantially, uniformly distributed throughout the dielectric.
Therefore, having a low-k dielectric materials with an inherent copper ion migration barrier that does not require such undesirable chemicals would be of great technological benefit.